Ternary Physical AI: a policy with no multiplies, on silicon anyone can make.
The cost of a decision is energy, and most of that energy is spent multiplying. A multiplier is the densest, most node-hungry block on an AI chip — the reason a good policy seems to demand a leading-edge fab. Ternary weights {−1, 0, +1} make the multiplier disappear: every multiply becomes an add, a subtract, or a skip. BitVLA showed a 1-bit Vision-Language-Action model can match a full-precision baseline at 11× less memory and 4.4× lower latency — the policy did not get worse, it got cheaper. Once inference is adds and lookups, the hardest part of the chip is gone, and a mature, high-yield, sovereign node becomes enough: 65 nm ternary compute-in-memory already reaches ~20 TOPS/W. This is the Swap-2C thesis in silicon — intelligence priced in joules, small enough for the body it lives in, on silicon that is not scarce.
A small policy — observation patch → action — trained live, then quantized. Toggle FP32 → Ternary {−1,0,+1} → Log and watch the ledger: the weights go 20× smaller, the multiplies go to zero, the energy falls, and the accuracy holds. It stays accurate because it is trained ternary (quantization-aware, straight-through), not squeezed after the fact. The silicon panel shows the payoff — no multiplier array means a mature node will do.
In the field · the energy problem is concrete — in the datacenter it is a grid-scale line item, on a robot it is the whole battery, and most of those joules are burned in the multiplier. Three camps chase it. Ternary lives in the models, and the models keep moving: Microsoft's BitNet b1.58 (with bitnet.cpp), its 2026 Sparse-BitNet, and BitVLA for embodied policies. The silicon lags: the most genuinely multiply-free ternary parts — BitROM (65 nm), TENET (28 nm), VitaLLM (TSMC 16 nm, 66 mW) — are research, mostly post-layout simulation rather than taped-out chips, and often heterogeneous, a conventional integer core still doing attention. Log-math is earlier still: multiply-becomes-addition (BitEnergy's L-Mul) is an algorithm ahead of its hardware, and the clearest log-math chip startup, Lemurian, has left silicon for software. Meanwhile the mainstream routes around both — into low-bit floating point (OCP's MXFP4, NVIDIA's NVFP4, Huawei's HiFloat8) — conceding that the number format is the lever while declining to pull it all the way. The models went 1-bit before anyone shipped 1-bit-native hardware; no fully-ternary or log-math ecosystem ships yet. That gap — multiply-free intelligence on mature, sovereign silicon, priced in joules — is what this topic works toward.
The ternary ↔ quantum bridge
Three states are the trit's other face. A qutrit — a three-level quantum system — is where ternary meets quantum information: apply the shift, clock, and Chrestenson (qutrit Hadamard) gates, entangle two into the ternary Bell state (|00⟩+|11⟩+|22⟩)/√3, then measure. It runs as a state-vector emulator on classical hardware — no quantum speedup is claimed, and that is exactly the point: three-level quantum information maps naturally onto ternary, so the same mature-node ternary substrate that runs an edge policy is a natural engine for simulating qutrit circuits. The state grows as 3ⁿ — faster than 2ⁿ, the honest ceiling.
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