1 bit
15 gates
30 transistors
4 of 4, exhaustive
A hardware description usually states what a machine is. It can instead state how one grows: give a base case and a rule for making a bigger version out of smaller ones, and every width falls out of the same two lines. That idea is only worth anything if the thing that grows actually works as a circuit, so here the grown graph is lowered to transistors and solved as one nonlinear electrical system. The design is correct when the analog voltages land on the right side of the threshold, and not before.
Each row is the same description unfolded to a different size, lowered to resistor-load gates, and solved. The small widths are checked on every possible input pair. Logic high comes out at 5.000 V and logic low at 0.192 V in every case, and the solver residual stays near machine precision.
1 bit
30 transistors
4 of 4, exhaustive
2 bit
60 transistors
16 of 16, exhaustive
4 bit
120 transistors
256 of 256, exhaustive
8 bit
240 transistors
24 of 24 sampled
16 bit
480 transistors
24 of 24 sampled
Supply 5 V, pull-up 10 kilohm, switch on-resistance 200 ohm, threshold at mid-rail. Worst logic high 5.000 V, worst logic low 0.192 V, worst solver residual 7.1e-16.
The growth, the lowering to transistors and the nonlinear solve all run in this page, on whatever device you are reading it on. Drag to orbit the graph, scroll to zoom, and click any node to see what it listens to and what voltage the solver gave it. Green nodes are the inputs you drive, gold are the outputs. Once it has grown, the solve lights the whole map up: gold is a node sitting at the rail, dark is one pulled to ground.
There is no bus size anywhere in the description. An adder of width n is two adders of half the width with the carry chained, and the recursion bottoms out in a one-bit full adder. Ask for sixteen bits and 240 gates unfold. The gate count comes out at exactly fifteen per bit, which is the base case repeating.
Everything is grown from NAND, so what the rule produces is a plain graph with no primitives smuggled in. NOT, AND, OR and XOR are each defined in terms of it, which is why a single full adder costs fifteen gates rather than the handful a library part would use. The inefficiency is the honesty.
Each NAND becomes a pull-up resistor and two switches in series to ground, which is a real resistor-load gate, and the whole design is solved as one nonlinear circuit. Nothing propagates ones and zeros. The adder is correct only because every output voltage lands on the right side of the switching threshold.
A conducting gate reads 0.192 V, and two switches in series against the pull-up predict 0.192 V. The engine is reproducing the circuit rather than snapping to logic levels, which is the check that the whole exercise rests on.
Worth stating plainly, because it is the difference between a demonstration and a method.
Newton's method from a zero initial guess converges on a single gate and falls apart on a few dozen. At four bits the residual sits at 8.2 and the node voltages park at the switching threshold, where the device derivative is largest and the iteration has no reason to pick a side. Every output then reads as a one and the adder returns nonsense.
Bringing the supply up from zero in forty increments, warm-starting each solve from the last, drops the residual to 3e-17 on the same circuit. That is source stepping, the standard remedy, and it is what makes a few hundred coupled gates solvable at all. The first version of these results was wrong in a way that looked like a device problem and was actually a solver problem, which is a good argument for reporting the residual next to the answer.
Circuits are in the same stack as the rigid bodies, the deformables, the grains and the fluids, for a straightforward reason: a circuit is a conservation-law system like the others. Current is conserved at every node, energy is stored in capacitors and inductors and dissipated in resistors, and the whole thing is integrated implicitly and checked against analytic answers. Growth is a graph operation; whether what grew is a working machine is a question for the physics.
The engine is ferromotion-circuit, open and installable, part of the ferromotion stack. The growth rules, the lowering and these checks live together in its morpho module, so every number above re-runs with a single command.